DjalimSimaila/yuzu
1
0
Fork 0
mirror of https://git.tardis.systems/mirrors/yuzu synced 2025-10-31 10:44:49 +01:00
Code Issues Packages Projects Releases Wiki Activity

arm: fix context save of vector regs

Browse Source
This commit is contained in:
Liam 2023-12-04 22:19:11 -05:00
parent 45c87c7e6e
commit f0ee3e29cb
1 changed files with 4 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
src/core/arm/dynarmic/arm_dynarmic_32.cpp
View File

@ -400,9 +400,8 @@ void ArmDynarmic32::GetContext(Kernel::Svc::ThreadContext& ctx) const {
ctx.pc = gpr[15];
ctx.pstate = j.Cpsr();
for (size_t i = 0; i < 32; i++) {
ctx.v[i] = {fpr[i], 0};
}
static_assert(sizeof(fpr) <= sizeof(ctx.v));
std::memcpy(ctx.v.data(), &fpr, sizeof(fpr));
auto [fpsr, fpcr] = FpscrToFpsrFpcr(j.Fpscr());
ctx.fpcr = fpcr;
@ -421,9 +420,8 @@ void ArmDynarmic32::SetContext(const Kernel::Svc::ThreadContext& ctx) {
j.SetCpsr(ctx.pstate);
for (size_t i = 0; i < 32; i++) {
fpr[i] = static_cast<u32>(ctx.v[i][0]);
}
static_assert(sizeof(fpr) <= sizeof(ctx.v));
std::memcpy(&fpr, ctx.v.data(), sizeof(fpr));
j.SetFpscr(FpsrFpcrToFpscr(ctx.fpsr, ctx.fpcr));
m_cp15->uprw = static_cast<u32>(ctx.tpidr);