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	Vulkan, OpenGL: Hook up storage buffer alignment code
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				@ -1938,14 +1938,20 @@ typename BufferCache<P>::Binding BufferCache<P>::StorageBufferBinding(GPUVAddr s
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                                                                      bool is_written) const {
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    const GPUVAddr gpu_addr = gpu_memory->Read<u64>(ssbo_addr);
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    const u32 size = gpu_memory->Read<u32>(ssbo_addr + 8);
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    const std::optional<VAddr> cpu_addr = gpu_memory->GpuToCpuAddress(gpu_addr);
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    const u32 alignment = runtime.GetStorageBufferAlignment();
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    const GPUVAddr aligned_gpu_addr = Common::AlignDown(gpu_addr, alignment);
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    const u32 aligned_size = Common::AlignUp(static_cast<u32>(gpu_addr - aligned_gpu_addr) + size, alignment);
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    const std::optional<VAddr> cpu_addr = gpu_memory->GpuToCpuAddress(aligned_gpu_addr);
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    if (!cpu_addr || size == 0) {
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        return NULL_BINDING;
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    }
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    const VAddr cpu_end = Common::AlignUp(*cpu_addr + size, Core::Memory::YUZU_PAGESIZE);
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    const VAddr cpu_end = Common::AlignUp(*cpu_addr + aligned_size, Core::Memory::YUZU_PAGESIZE);
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    const Binding binding{
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        .cpu_addr = *cpu_addr,
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        .size = is_written ? size : static_cast<u32>(cpu_end - *cpu_addr),
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        .size = is_written ? aligned_size : static_cast<u32>(cpu_end - *cpu_addr),
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        .buffer_id = BufferId{},
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    };
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    return binding;
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@ -160,6 +160,10 @@ public:
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        return device.CanReportMemoryUsage();
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    }
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    u32 GetStorageBufferAlignment() const {
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        return static_cast<u32>(device.GetShaderStorageBufferAlignment());
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    }
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private:
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    static constexpr std::array PABO_LUT{
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        GL_VERTEX_PROGRAM_PARAMETER_BUFFER_NV,          GL_TESS_CONTROL_PROGRAM_PARAMETER_BUFFER_NV,
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@ -236,6 +236,7 @@ ShaderCache::ShaderCache(RasterizerOpenGL& rasterizer_, Core::Frontend::EmuWindo
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          .needs_demote_reorder = device.IsAmd(),
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          .support_snorm_render_buffer = false,
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          .support_viewport_index_layer = device.HasVertexViewportLayer(),
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          .min_ssbo_alignment = static_cast<u32>(device.GetShaderStorageBufferAlignment()),
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      } {
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    if (use_asynchronous_shaders) {
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        workers = CreateWorkers();
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@ -330,6 +330,10 @@ bool BufferCacheRuntime::CanReportMemoryUsage() const {
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    return device.CanReportMemoryUsage();
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}
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u32 BufferCacheRuntime::GetStorageBufferAlignment() const {
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    return static_cast<u32>(device.GetStorageBufferAlignment());
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}
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void BufferCacheRuntime::Finish() {
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    scheduler.Finish();
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}
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@ -73,6 +73,8 @@ public:
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    bool CanReportMemoryUsage() const;
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    u32 GetStorageBufferAlignment() const;
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    [[nodiscard]] StagingBufferRef UploadStagingBuffer(size_t size);
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    [[nodiscard]] StagingBufferRef DownloadStagingBuffer(size_t size);
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@ -344,6 +344,7 @@ PipelineCache::PipelineCache(RasterizerVulkan& rasterizer_, const Device& device
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            driver_id == VK_DRIVER_ID_AMD_PROPRIETARY || driver_id == VK_DRIVER_ID_AMD_OPEN_SOURCE,
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        .support_snorm_render_buffer = true,
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        .support_viewport_index_layer = device.IsExtShaderViewportIndexLayerSupported(),
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        .min_ssbo_alignment = static_cast<u32>(device.GetStorageBufferAlignment()),
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    };
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    if (device.GetMaxVertexInputAttributes() < Maxwell::NumVertexAttributes) {
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